ci: cache a port's submodules in an entry of their own - #11345
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Every board job of a port cloned the port's submodules over the network: stm's 29 CMSIS and HAL repositories take 59 seconds a job, raspberrypi's sdk, lwip, cyw43 and PicoDVI 17 seconds, 159 times per full run. The common submodule cache holds extmod/ulab, lib/ and tools/ and stays as it is; board jobs add a second entry with ports/<port>, keyed by the port and the state of its submodules. espressif and zephyr-cp keep their own arrangements.
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every board job of a port clones the port's submodules over the network: stm's 29 CMSIS and HAL repositories take 59 seconds a job, raspberrypi's sdk, lwip, cyw43 and PicoDVI 17 seconds, 159 times per full run. The submodule cache holds
extmod/ulab,lib/andtools/only.Board jobs of stm, raspberrypi and mimxrt10xx now get a second entry,
submodules-<port>-<hash>, with.git/modules/ports/<port>and the port's submodule paths. The first job of a port to miss saves it, the rest read it. The common cache stays as it is.Measured on my fork, warm:
espressif keeps its own
submodules-idfcache for now; it could move to this mechanism in a follow-up if you want.