diff --git a/gen_input/templates/CORENAME.cpp.gtl b/gen_input/templates/CORENAME.cpp.gtl
index 05a4f39..f6aba5b 100644
--- a/gen_input/templates/CORENAME.cpp.gtl
+++ b/gen_input/templates/CORENAME.cpp.gtl
@@ -57,14 +57,10 @@ ${coreDef.name.toLowerCase()}::${coreDef.name.toLowerCase()}()  = default;
 ${coreDef.name.toLowerCase()}::~${coreDef.name.toLowerCase()}() = default;
 
 void ${coreDef.name.toLowerCase()}::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<${coreDef.name.toLowerCase()}>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<${coreDef.name.toLowerCase()}>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *${coreDef.name.toLowerCase()}::get_regs_base_ptr() {
diff --git a/src/iss/arch/rv32gc.cpp b/src/iss/arch/rv32gc.cpp
index fa8bcdd..49a8c3d 100644
--- a/src/iss/arch/rv32gc.cpp
+++ b/src/iss/arch/rv32gc.cpp
@@ -50,14 +50,10 @@ rv32gc::rv32gc()  = default;
 rv32gc::~rv32gc() = default;
 
 void rv32gc::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv32gc>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv32gc>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv32gc::get_regs_base_ptr() {
diff --git a/src/iss/arch/rv32gcv.cpp b/src/iss/arch/rv32gcv.cpp
index ffd5b8e..1f8ae650 100644
--- a/src/iss/arch/rv32gcv.cpp
+++ b/src/iss/arch/rv32gcv.cpp
@@ -50,14 +50,10 @@ rv32gcv::rv32gcv()  = default;
 rv32gcv::~rv32gcv() = default;
 
 void rv32gcv::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv32gcv>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv32gcv>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv32gcv::get_regs_base_ptr() {
diff --git a/src/iss/arch/rv32i.cpp b/src/iss/arch/rv32i.cpp
index 2ee95c7..14abafd 100644
--- a/src/iss/arch/rv32i.cpp
+++ b/src/iss/arch/rv32i.cpp
@@ -50,14 +50,10 @@ rv32i::rv32i()  = default;
 rv32i::~rv32i() = default;
 
 void rv32i::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv32i>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv32i>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv32i::get_regs_base_ptr() {
diff --git a/src/iss/arch/rv32imac.cpp b/src/iss/arch/rv32imac.cpp
index fced3e4..92e5445 100644
--- a/src/iss/arch/rv32imac.cpp
+++ b/src/iss/arch/rv32imac.cpp
@@ -50,14 +50,10 @@ rv32imac::rv32imac()  = default;
 rv32imac::~rv32imac() = default;
 
 void rv32imac::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv32imac>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv32imac>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv32imac::get_regs_base_ptr() {
diff --git a/src/iss/arch/rv64gc.cpp b/src/iss/arch/rv64gc.cpp
index d6f81d4..2e8c404 100644
--- a/src/iss/arch/rv64gc.cpp
+++ b/src/iss/arch/rv64gc.cpp
@@ -50,14 +50,10 @@ rv64gc::rv64gc()  = default;
 rv64gc::~rv64gc() = default;
 
 void rv64gc::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv64gc>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv64gc>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv64gc::get_regs_base_ptr() {
diff --git a/src/iss/arch/rv64gcv.cpp b/src/iss/arch/rv64gcv.cpp
index 3264c79..ef992a0 100644
--- a/src/iss/arch/rv64gcv.cpp
+++ b/src/iss/arch/rv64gcv.cpp
@@ -50,14 +50,10 @@ rv64gcv::rv64gcv()  = default;
 rv64gcv::~rv64gcv() = default;
 
 void rv64gcv::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv64gcv>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv64gcv>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv64gcv::get_regs_base_ptr() {
diff --git a/src/iss/arch/rv64i.cpp b/src/iss/arch/rv64i.cpp
index 6cfe725..09c112d 100644
--- a/src/iss/arch/rv64i.cpp
+++ b/src/iss/arch/rv64i.cpp
@@ -50,14 +50,10 @@ rv64i::rv64i()  = default;
 rv64i::~rv64i() = default;
 
 void rv64i::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv64i>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv64i>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv64i::get_regs_base_ptr() {
diff --git a/src/iss/arch/rv64imac.cpp b/src/iss/arch/rv64imac.cpp
index ce78811..41eb39f 100644
--- a/src/iss/arch/rv64imac.cpp
+++ b/src/iss/arch/rv64imac.cpp
@@ -50,14 +50,10 @@ rv64imac::rv64imac()  = default;
 rv64imac::~rv64imac() = default;
 
 void rv64imac::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv64imac>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv64imac>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv64imac::get_regs_base_ptr() {
diff --git a/src/vm/asmjit/vm_rv32gc.cpp b/src/vm/asmjit/vm_rv32gc.cpp
index c073d9e..d476c41 100644
--- a/src/vm/asmjit/vm_rv32gc.cpp
+++ b/src/vm/asmjit/vm_rv32gc.cpp
@@ -29,7 +29,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  *******************************************************************************/
-
+ 
 // clang-format off
 #include <iss/arch/rv32gc.h>
 #include <iss/debugger/gdb_session.h>
@@ -10106,8 +10106,8 @@ std::unique_ptr<vm_if> create<arch::rv32gc>(arch::rv32gc *core, unsigned short p
 } // namespace iss
 
 #include <iss/arch/riscv_hart_m_p.h>
-#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/arch/riscv_hart_mu_p.h>
+#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/factory.h>
 namespace iss {
 namespace {
diff --git a/src/vm/asmjit/vm_rv32gcv.cpp b/src/vm/asmjit/vm_rv32gcv.cpp
index 7472635..e4ad6a6 100644
--- a/src/vm/asmjit/vm_rv32gcv.cpp
+++ b/src/vm/asmjit/vm_rv32gcv.cpp
@@ -29,7 +29,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  *******************************************************************************/
-
+ 
 // clang-format off
 #include <iss/arch/rv32gcv.h>
 #include <iss/debugger/gdb_session.h>
@@ -85513,8 +85513,8 @@ std::unique_ptr<vm_if> create<arch::rv32gcv>(arch::rv32gcv *core, unsigned short
 } // namespace iss
 
 #include <iss/arch/riscv_hart_m_p.h>
-#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/arch/riscv_hart_mu_p.h>
+#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/factory.h>
 namespace iss {
 namespace {
diff --git a/src/vm/asmjit/vm_rv32i.cpp b/src/vm/asmjit/vm_rv32i.cpp
index 4231527..70f0bec 100644
--- a/src/vm/asmjit/vm_rv32i.cpp
+++ b/src/vm/asmjit/vm_rv32i.cpp
@@ -29,7 +29,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  *******************************************************************************/
-
+ 
 // clang-format off
 #include <iss/arch/rv32i.h>
 #include <iss/debugger/gdb_session.h>
@@ -2949,8 +2949,8 @@ std::unique_ptr<vm_if> create<arch::rv32i>(arch::rv32i *core, unsigned short por
 } // namespace iss
 
 #include <iss/arch/riscv_hart_m_p.h>
-#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/arch/riscv_hart_mu_p.h>
+#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/factory.h>
 namespace iss {
 namespace {
diff --git a/src/vm/asmjit/vm_rv32imac.cpp b/src/vm/asmjit/vm_rv32imac.cpp
index 2a505a2..98e72b0 100644
--- a/src/vm/asmjit/vm_rv32imac.cpp
+++ b/src/vm/asmjit/vm_rv32imac.cpp
@@ -29,7 +29,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  *******************************************************************************/
-
+ 
 // clang-format off
 #include <iss/arch/rv32imac.h>
 #include <iss/debugger/gdb_session.h>
@@ -5549,8 +5549,8 @@ std::unique_ptr<vm_if> create<arch::rv32imac>(arch::rv32imac *core, unsigned sho
 } // namespace iss
 
 #include <iss/arch/riscv_hart_m_p.h>
-#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/arch/riscv_hart_mu_p.h>
+#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/factory.h>
 namespace iss {
 namespace {
diff --git a/src/vm/asmjit/vm_rv64gc.cpp b/src/vm/asmjit/vm_rv64gc.cpp
index 59baf1c..dd412d1 100644
--- a/src/vm/asmjit/vm_rv64gc.cpp
+++ b/src/vm/asmjit/vm_rv64gc.cpp
@@ -29,7 +29,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  *******************************************************************************/
-
+ 
 // clang-format off
 #include <iss/arch/rv64gc.h>
 #include <iss/debugger/gdb_session.h>
@@ -12687,8 +12687,8 @@ std::unique_ptr<vm_if> create<arch::rv64gc>(arch::rv64gc *core, unsigned short p
 } // namespace iss
 
 #include <iss/arch/riscv_hart_m_p.h>
-#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/arch/riscv_hart_mu_p.h>
+#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/factory.h>
 namespace iss {
 namespace {
diff --git a/src/vm/asmjit/vm_rv64gcv.cpp b/src/vm/asmjit/vm_rv64gcv.cpp
index c625cb0..54ff0ea 100644
--- a/src/vm/asmjit/vm_rv64gcv.cpp
+++ b/src/vm/asmjit/vm_rv64gcv.cpp
@@ -29,7 +29,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  *******************************************************************************/
-
+ 
 // clang-format off
 #include <iss/arch/rv64gcv.h>
 #include <iss/debugger/gdb_session.h>
@@ -88094,8 +88094,8 @@ std::unique_ptr<vm_if> create<arch::rv64gcv>(arch::rv64gcv *core, unsigned short
 } // namespace iss
 
 #include <iss/arch/riscv_hart_m_p.h>
-#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/arch/riscv_hart_mu_p.h>
+#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/factory.h>
 namespace iss {
 namespace {
diff --git a/src/vm/asmjit/vm_rv64i.cpp b/src/vm/asmjit/vm_rv64i.cpp
index f1cc199..e1de294 100644
--- a/src/vm/asmjit/vm_rv64i.cpp
+++ b/src/vm/asmjit/vm_rv64i.cpp
@@ -29,7 +29,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  *******************************************************************************/
-
+ 
 // clang-format off
 #include <iss/arch/rv64i.h>
 #include <iss/debugger/gdb_session.h>
@@ -3604,8 +3604,8 @@ std::unique_ptr<vm_if> create<arch::rv64i>(arch::rv64i *core, unsigned short por
 } // namespace iss
 
 #include <iss/arch/riscv_hart_m_p.h>
-#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/arch/riscv_hart_mu_p.h>
+#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/factory.h>
 namespace iss {
 namespace {
diff --git a/src/vm/asmjit/vm_rv64imac.cpp b/src/vm/asmjit/vm_rv64imac.cpp
index b22705b..5e2f240 100644
--- a/src/vm/asmjit/vm_rv64imac.cpp
+++ b/src/vm/asmjit/vm_rv64imac.cpp
@@ -29,7 +29,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  *******************************************************************************/
-
+ 
 // clang-format off
 #include <iss/arch/rv64imac.h>
 #include <iss/debugger/gdb_session.h>
@@ -7597,8 +7597,8 @@ std::unique_ptr<vm_if> create<arch::rv64imac>(arch::rv64imac *core, unsigned sho
 } // namespace iss
 
 #include <iss/arch/riscv_hart_m_p.h>
-#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/arch/riscv_hart_mu_p.h>
+#include <iss/arch/riscv_hart_msu_vp.h>
 #include <iss/factory.h>
 namespace iss {
 namespace {