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jiepan-intelv8-scoped@luci-project-accounts.iam.gserviceaccount.com
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[APX] [assembler] Add emit_rex2_or_rex prefix wrapper functions
APX places r16-r31 out of reach of the legacy REX prefix: an instruction referencing one of them, directly or as the base or index of a memory operand, has to be encoded with REX2 instead. Add emit_rex2_or_rex, emit_rex2_or_rex_64, emit_rex2_or_rex_32 and emit_optional_rex2_or_rex_32, mirroring the existing emit_rex_* family, which pick REX2 when an operand needs it and fall back to the legacy prefix otherwise. REX2 also carries the opcode map in its M0 bit and must be the last byte before the opcode, so the 0x0F escape byte has to be dropped exactly when a REX2 prefix is emitted. Rather than report that back to the call site, the wrappers take the map as a Rex2MapID and emit the escape byte themselves, so the prefix and the escape cannot get out of sync. REX2 has a single map bit, so instructions in the 0x0F38 and 0x0F3A maps still need a VEX or EVEX encoding to reach the extended GPRs. Bug: 474204750 Change-Id: I102a423e19dc8c1374265248325951caf1ab3ea6 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/8422347 Reviewed-by: Leszek Swirski <leszeks@chromium.org> Reviewed-by: Jakob Kummerow <jkummerow@chromium.org> Commit-Queue: Pan, Jie <jie.pan@intel.com> Cr-Commit-Position: refs/heads/main@{#109955}
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‎src/codegen/x64/assembler-x64.h‎

Lines changed: 158 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3213,6 +3213,164 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
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}
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}
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#ifdef V8_ENABLE_APX_F
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// True if the operand can only be encoded with a REX2 prefix, i.e. if it
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// references one of the extended GPRs r16-r31 -- directly, or as the base or
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// index register of a memory operand.
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inline bool needs_rex2_prefix(Register reg) { return reg.bit4(); }
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inline bool needs_rex2_prefix(Operand op) { return op.rex2(); }
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template <class P1, class P2>
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bool needs_rex2_prefix(P1 p1, P2 p2) {
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return needs_rex2_prefix(p1) || needs_rex2_prefix(p2);
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}
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#endif // V8_ENABLE_APX_F
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// Emits the 0x0F escape byte if the opcode lives in legacy map 1. Only a
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// legacy REX prefix needs this: a REX2 prefix carries the map in its M0 bit
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// and must be the last byte before the opcode.
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inline void emit_legacy_map_escape(Rex2MapID m) {
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if (m == kRex2Map1) emit(0x0F);
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}
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// emit_rex2_or_rex[_64|_32](operands..., m) emits everything between the
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// legacy prefixes and the opcode of an instruction whose opcode lives in
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// legacy map {m} -- kRex2Map0 for a one-byte opcode, kRex2Map1 for a
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// 0x0F-escaped one:
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// - a single REX2 prefix, if any operand references r16-r31. REX2 encodes
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// the map itself, so it replaces the 0x0F escape byte.
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// - otherwise the legacy REX prefix, followed by the 0x0F escape byte if
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// {m} is kRex2Map1.
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// The caller emits only the opcode, so the prefix and the escape byte cannot
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// get out of sync. Any legacy prefix (0x66/0xF2/0xF3/segment override) must
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// already have been emitted; REX and REX2 both come last.
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//
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// REX2 has a single map bit, so instructions in the 0x0F38 and 0x0F3A maps
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// cannot use these helpers at all -- they need a VEX or EVEX encoding to
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// reach the extended GPRs.
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//
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// Unlike the emit_rex_* helpers these do not accept an XMMRegister yet: the
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// underlying emit_rex2_* emitters only take a GPR in the reg field.
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void emit_rex2_or_rex(int size, Rex2MapID m) {
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// Without operands there is no EGPR to encode, so REX2 is never needed.
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emit_rex(size);
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emit_legacy_map_escape(m);
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}
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template <class P1>
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void emit_rex2_or_rex(P1 p1, int size, Rex2MapID m) {
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#ifdef V8_ENABLE_APX_F
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if (needs_rex2_prefix(p1)) {
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if (size == kInt64Size) {
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emit_rex2_64(p1, m);
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} else {
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DCHECK_EQ(size, kInt32Size);
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emit_rex2_32(p1, m);
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}
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return;
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}
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#endif // V8_ENABLE_APX_F
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emit_rex(p1, size);
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emit_legacy_map_escape(m);
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}
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template <class P1, class P2>
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void emit_rex2_or_rex(P1 p1, P2 p2, int size, Rex2MapID m) {
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#ifdef V8_ENABLE_APX_F
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if (needs_rex2_prefix(p1, p2)) {
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if (size == kInt64Size) {
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emit_rex2_64(p1, p2, m);
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} else {
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DCHECK_EQ(size, kInt32Size);
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emit_rex2_32(p1, p2, m);
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}
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return;
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}
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#endif // V8_ENABLE_APX_F
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emit_rex(p1, p2, size);
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emit_legacy_map_escape(m);
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}
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void emit_rex2_or_rex_64(Rex2MapID m) {
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emit_rex_64();
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emit_legacy_map_escape(m);
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}
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template <class P1>
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void emit_rex2_or_rex_64(P1 p1, Rex2MapID m) {
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#ifdef V8_ENABLE_APX_F
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if (needs_rex2_prefix(p1)) {
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emit_rex2_64(p1, m);
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return;
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}
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#endif // V8_ENABLE_APX_F
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emit_rex_64(p1);
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emit_legacy_map_escape(m);
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}
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template <class P1, class P2>
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void emit_rex2_or_rex_64(P1 p1, P2 p2, Rex2MapID m) {
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#ifdef V8_ENABLE_APX_F
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if (needs_rex2_prefix(p1, p2)) {
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emit_rex2_64(p1, p2, m);
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return;
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}
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#endif // V8_ENABLE_APX_F
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emit_rex_64(p1, p2);
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emit_legacy_map_escape(m);
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}
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template <class P1>
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void emit_rex2_or_rex_32(P1 p1, Rex2MapID m) {
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#ifdef V8_ENABLE_APX_F
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if (needs_rex2_prefix(p1)) {
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emit_rex2_32(p1, m);
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return;
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}
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#endif // V8_ENABLE_APX_F
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emit_rex_32(p1);
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emit_legacy_map_escape(m);
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}
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template <class P1, class P2>
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void emit_rex2_or_rex_32(P1 p1, P2 p2, Rex2MapID m) {
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#ifdef V8_ENABLE_APX_F
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if (needs_rex2_prefix(p1, p2)) {
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emit_rex2_32(p1, p2, m);
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return;
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}
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#endif // V8_ENABLE_APX_F
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emit_rex_32(p1, p2);
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emit_legacy_map_escape(m);
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}
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// As emit_rex2_or_rex_32, but the REX prefix is omitted entirely when it
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// would be all-zero. Only the REX fallback is optional: a REX2 prefix is
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// always emitted when an operand needs one.
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template <class P1>
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void emit_optional_rex2_or_rex_32(P1 p1, Rex2MapID m) {
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#ifdef V8_ENABLE_APX_F
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if (needs_rex2_prefix(p1)) {
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emit_rex2_32(p1, m);
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return;
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}
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#endif // V8_ENABLE_APX_F
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emit_optional_rex_32(p1);
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emit_legacy_map_escape(m);
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}
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template <class P1, class P2>
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void emit_optional_rex2_or_rex_32(P1 p1, P2 p2, Rex2MapID m) {
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#ifdef V8_ENABLE_APX_F
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if (needs_rex2_prefix(p1, p2)) {
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emit_rex2_32(p1, p2, m);
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return;
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}
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#endif // V8_ENABLE_APX_F
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emit_optional_rex_32(p1, p2);
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emit_legacy_map_escape(m);
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}
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// Emit vex prefix
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void emit_vex2_byte0() { emit(0xc5); }
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inline void emit_vex2_byte1(XMMRegister reg, XMMRegister v, VectorLength l,

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