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David Sommerseth
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New upstream release v3.12.1
This includes a rebase against upstream dmidecode v2.12 and an update against the SMBIOS reference specification v2.8.0. Signed-off-by: David Sommerseth <davids@redhat.com>
1 parent 4ca9576 commit 4684a91

6 files changed

Lines changed: 90 additions & 15 deletions

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‎contrib/python-dmidecode.spec‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33

44
Summary: Python module to access DMI data
55
Name: python-dmidecode
6-
Version: 3.11.1
6+
Version: 3.12.1
77
Release: 1%{?dist}
88
License: GPLv2
99
Group: System Environment/Libraries
@@ -49,6 +49,9 @@ rm -rf $RPM_BUILD_ROOT
4949
%{_datadir}/python-dmidecode/
5050

5151
%changelog
52+
* Mon Jul 8 2013 David Sommerseth <dazo@users.sourceforge.net> - 3.12.1-1
53+
- Updated against upstream v3.12.1, which realigns against dmidecode 2.12
54+
5255
* Thu Jul 4 2013 David Sommerseth <dazo@users.sourceforge.net> - 3.11.1-1
5356
- Updated against upstream v3.11.1, which realigns against dmidecode 2.11
5457

‎man/dmidecode.8‎

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
.TH DMIDECODE 8 "October 2008" "dmidecode"
1+
.TH DMIDECODE 8 "March 2012" "dmidecode"
22
.SH NAME
33
dmidecode \- \s-1DMI\s0 table decoder
44
.SH SYNOPSIS
@@ -127,6 +127,13 @@ Display the version and exit
127127
.P
128128
Options --string, --type, --dump and --dump-bin
129129
determine the output format and are mutually exclusive.
130+
.P
131+
Please note in case of
132+
.B dmidecode
133+
is run on a system with BIOS that boasts new SMBIOS specification, which
134+
is not supported by the tool yet, it will print out relevant message in
135+
addition to requested data on the very top of the output. Thus informs the
136+
output data is not reliable.
130137

131138
.SH "DMI TYPES"
132139
The \s-1SMBIOS\s0 specification defines the following \s-1DMI\s0 types:
@@ -138,7 +145,7 @@ r l.
138145
Type Information
139146
0 BIOS
140147
1 System
141-
2 Base Board
148+
2 Baseboard
142149
3 Chassis
143150
4 Processor
144151
5 Memory Controller
@@ -176,6 +183,9 @@ Type Information
176183
37 Memory Channel
177184
38 IPMI Device
178185
39 Power Supply
186+
40 Additional Information
187+
41 Onboard Devices Extended Information
188+
42 Management Controller Host Interface
179189
.TE
180190

181191
Additionally, type 126 is used for disabled entries and type 127 is an

‎src/config.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@
4141
#define CONFIG_H
4242

4343
/* Default memory device file */
44-
#ifdef __BEOS__
44+
#if defined(__BEOS__) || defined(__HAIKU__)
4545
#define DEFAULT_MEM_DEV "/dev/misc/mem"
4646
#else
4747
#define DEFAULT_MEM_DEV "/dev/mem"

‎src/dmidecode.c‎

Lines changed: 71 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@
4444
* DMI Decode
4545
*
4646
* Unless specified otherwise, all references are aimed at the "System
47-
* Management BIOS Reference Specification, Version 2.7.0" document,
47+
* Management BIOS Reference Specification, Version 2.8.0" document,
4848
* available from http://www.dmtf.org/standards/smbios.
4949
*
5050
* Note to contributors:
@@ -627,6 +627,8 @@ void dmi_chassis_type(xmlNode *node, u8 code)
627627
dmixml_AddAttribute(type_n, "dmispec", "7.4.1");
628628
dmixml_AddAttribute(type_n, "flags", "0x%04x", code);
629629

630+
code &= 0x7F; /* bits 6:0 are chassis type, 7th bit is the lock bit */
631+
630632
if(code >= 0x01 && code <= 0x1B) {
631633
dmixml_AddAttribute(type_n, "available", "1");
632634
dmixml_AddTextContent(type_n, "%s", type[code - 0x01]);
@@ -841,14 +843,26 @@ void dmi_processor_family(xmlNode *node, const struct dmi_header *h, u16 ver)
841843
{ 0x3A, "Athlon II Dual-Core M" },
842844
{ 0x3B, "Opteron 6100" },
843845
{ 0x3C, "Opteron 4100" },
844-
846+
{ 0x3D, "Opteron 6200" },
847+
{ 0x3E, "Opteron 4200" },
848+
{ 0x3F, "FX" },
845849

846850
{ 0x40, "MIPS" },
847851
{ 0x41, "MIPS R4000" },
848852
{ 0x42, "MIPS R4200" },
849853
{ 0x43, "MIPS R4400" },
850854
{ 0x44, "MIPS R4600" },
851855
{ 0x45, "MIPS R10000" },
856+
{ 0x46, "C-Series" },
857+
{ 0x47, "E-Series" },
858+
{ 0x48, "A-Series" },
859+
{ 0x49, "G-Series" },
860+
{ 0x4A, "Z-Series" },
861+
{ 0x4B, "R-Series" },
862+
{ 0x4C, "Opteron 4300" },
863+
{ 0x4D, "Opteron 6300" },
864+
{ 0x4E, "Opteron 3300" },
865+
{ 0x4F, "FirePro" },
852866

853867
{ 0x50, "SPARC" },
854868
{ 0x51, "SuperSPARC" },
@@ -962,6 +976,8 @@ void dmi_processor_family(xmlNode *node, const struct dmi_header *h, u16 ver)
962976
{ 0xDF, "Multi-Core Xeon 7xxx" },
963977
{ 0xE0, "Multi-Core Xeon 3400" },
964978

979+
{ 0xE4, "Opteron 3000" },
980+
{ 0xE5, "Sempron II" },
965981
{ 0xE6, "Embedded Opteron Quad-Core" },
966982
{ 0xE7, "Phenom Triple-Core" },
967983
{ 0xE8, "Turion Ultra Dual-Core Mobile" },
@@ -1184,7 +1200,8 @@ xmlNode *dmi_processor_id(xmlNode *node, const struct dmi_header *h)
11841200

11851201
} else if((type >= 0x18 && type <= 0x1D) /* AMD */
11861202
||type == 0x1F /* AMD */
1187-
||(type >= 0x38 && type <= 0x3C) /* AMD */
1203+
||(type >= 0x38 && type <= 0x3E) /* AMD */
1204+
||(type >= 0x46 && type <= 0x49) /* AMD */
11881205
||(type >= 0x83 && type <= 0x8F) /* AMD */
11891206
||(type >= 0xB6 && type <= 0xB7) /* AMD */
11901207
||(type >= 0xE6 && type <= 0xEF) /* AMD */
@@ -1356,13 +1373,26 @@ void dmi_processor_upgrade(xmlNode *node, u8 code)
13561373
"Socket LGA1567",
13571374
"Socket PGA988A",
13581375
"Socket BGA1288" /* 0x20 */
1376+
"Socket rPGA988B",
1377+
"Socket BGA1023",
1378+
"Socket BGA1224",
1379+
"Socket BGA1155",
1380+
"Socket LGA1356",
1381+
"Socket LGA2011",
1382+
"Socket FS1",
1383+
"Socket FS2",
1384+
"Socket FM1",
1385+
"Socket FM2",
1386+
"Socket LGA2011-3",
1387+
"Socket LGA1356-3" /* 0x2C */
1388+
13591389
};
13601390
xmlNode *upgr_n = xmlNewChild(node, NULL, (xmlChar *) "Upgrade", NULL);
13611391
assert( upgr_n != NULL );
13621392
dmixml_AddAttribute(upgr_n, "dmispec", "7.5.5");
13631393
dmixml_AddAttribute(upgr_n, "flags", "0x%04x", code);
13641394

1365-
if(code >= 0x01 && code <= 0x20) {
1395+
if(code >= 0x01 && code <= 0x2A) {
13661396
dmixml_AddTextContent(upgr_n, "%s", upgrade[code - 0x01]);
13671397
} else {
13681398
dmixml_AddAttribute(upgr_n, "outofspec", "1");
@@ -1811,13 +1841,14 @@ void dmi_cache_associativity(xmlNode *node, u8 code)
18111841
"32-way Set-associative",
18121842
"48-way Set-associative",
18131843
"64-way Set-associative" /* 0x0D */
1844+
"20-way Set-associative" /* 0x0E */
18141845
};
18151846
xmlNode *data_n = xmlNewChild(node, NULL, (xmlChar *) "Associativity", NULL);
18161847
assert( data_n != NULL );
18171848
dmixml_AddAttribute(data_n, "dmispec", "7.8.5");
18181849
dmixml_AddAttribute(data_n, "flags", "0x%04x", code);
18191850

1820-
if(code >= 0x01 && code <= 0x0D) {
1851+
if(code >= 0x01 && code <= 0x0E) {
18211852
dmixml_AddTextContent(data_n, type[code - 0x01]);
18221853
} else {
18231854
dmixml_AddAttribute(data_n, "outofspec", "1");
@@ -1999,6 +2030,12 @@ void dmi_slot_type(xmlNode *node, u8 code)
19992030
"PCI Express 2 x4",
20002031
"PCI Express 2 x8",
20012032
"PCI Express 2 x16", /* 0xB0 */
2033+
"PCI Express 3",
2034+
"PCI Express 3 x1",
2035+
"PCI Express 3 x2",
2036+
"PCI Express 3 x4",
2037+
"PCI Express 3 x8",
2038+
"PCI Express 3 x16" /* 0xB6 */
20022039
};
20032040
xmlNode *data_n = xmlNewChild(node, NULL, (xmlChar *) "SlotType", NULL);
20042041
assert( data_n != NULL );
@@ -2007,7 +2044,7 @@ void dmi_slot_type(xmlNode *node, u8 code)
20072044

20082045
if(code >= 0x01 && code <= 0x13) {
20092046
dmixml_AddTextContent(data_n, "%s", type[code - 0x01]);
2010-
} else if(code >= 0xA0 && code <= 0xB0) {
2047+
} else if(code >= 0xA0 && code <= 0xB6) {
20112048
dmixml_AddTextContent(data_n, "%s", type_0xA0[code - 0xA0]);
20122049
} else {
20132050
dmixml_AddAttribute(data_n, "outofspec", "1");
@@ -2605,7 +2642,7 @@ void dmi_memory_array_location(xmlNode *node, u8 code)
26052642

26062643
if(code >= 0x01 && code <= 0x0A) {
26072644
dmixml_AddTextContent(data_n, location[code - 0x01]);
2608-
} else if(code >= 0xA0 && code <= 0xA4) {
2645+
} else if(code >= 0xA0 && code <= 0xA3) {
26092646
dmixml_AddTextContent(data_n, location_0xA0[code - 0xA0]);
26102647
} else {
26112648
dmixml_AddAttribute(data_n, "outofspec", "1");
@@ -2860,7 +2897,8 @@ void dmi_memory_device_type_detail(xmlNode *node, u16 code)
28602897
"Cache DRAM",
28612898
"Non-Volatile", /* 12 */
28622899
"Registered (Buffered)",
2863-
"Unbuffered (Unregistered)" /* 14 */
2900+
"Unbuffered (Unregistered)", /* 14 */
2901+
"LRDIMM" /* 15 */
28642902
};
28652903
xmlNode *data_n = xmlNewChild(node, NULL, (xmlChar *) "TypeDetails", NULL);
28662904
assert( data_n != NULL );
@@ -2893,6 +2931,19 @@ void dmi_memory_device_speed(xmlNode *node, const char *tag, u16 code)
28932931
}
28942932
}
28952933

2934+
void dmi_memory_voltage_value(xmlNode *node, const char *tag, u16 code) {
2935+
xmlNode *data_n = xmlNewChild(node, NULL, (xmlChar *) tag, NULL);
2936+
assert( data_n != NULL );
2937+
dmixml_AddAttribute(data_n, "flags", "0x%04x", code);
2938+
2939+
if (code == 0) {
2940+
dmixml_AddAttribute(data_n, "unknown", "1");
2941+
} else {
2942+
dmixml_AddAttribute(data_n, "unit", "V");
2943+
dmixml_AddTextContent(data_n, "%.3f", (float)(i16)code / 1000);
2944+
}
2945+
}
2946+
28962947
/*******************************************************************************
28972948
* 7.19 32-bit Memory Error Information (Type 18)
28982949
*/
@@ -4074,7 +4125,7 @@ xmlNode *dmi_decode(xmlNode *prnt_n, dmi_codes_major *dmiMajor, struct dmi_heade
40744125
}
40754126

40764127
dmixml_AddDMIstring(sect_n, "Manufacturer", h, data[0x04]);
4077-
dmi_chassis_type(sect_n, data[0x05] & 0x7F);
4128+
dmi_chassis_type(sect_n, data[0x05]);
40784129
dmi_chassis_lock(sect_n, data[0x05] >> 7);
40794130
dmixml_AddDMIstring(sect_n, "Version", h, data[0x06]);
40804131
dmixml_AddDMIstring(sect_n, "SerialNumber", h, data[0x07]);
@@ -4520,6 +4571,17 @@ xmlNode *dmi_decode(xmlNode *prnt_n, dmi_codes_major *dmiMajor, struct dmi_heade
45204571
}
45214572

45224573
dmi_memory_device_speed(sect_n, "CurrentClockSpeed", WORD(data + 0x20));
4574+
4575+
if(h->length < 0x28) {
4576+
break;
4577+
}
4578+
sub_n = xmlNewChild(sect_n, NULL, (xmlChar *) "MemoryVoltage", NULL);
4579+
assert( sub_n != NULL );
4580+
dmi_memory_voltage_value(sub_n, "Minimum", WORD(data + 0x22));
4581+
dmi_memory_voltage_value(sub_n, "Maximum", WORD(data + 0x24));
4582+
dmi_memory_voltage_value(sub_n, "Current", WORD(data + 0x26));
4583+
sub_n = NULL;
4584+
45234585
break;
45244586

45254587
case 18: /* 7.19 32-bit Memory Error Information */

‎src/dmioem.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -93,7 +93,7 @@ static int dmi_decode_hp(struct dmi_header *h)
9393
*/
9494
printf(h->type == 221 ?
9595
"HP BIOS iSCSI NIC PCI and MAC Information\n" :
96-
"HP BIOS NIC PCI and MAC Information\n");
96+
"HP BIOS NIC PXE PCI and MAC Information\n");
9797
nic = 1;
9898
ptr = 4;
9999
while(h->length >= ptr + 8) {

‎src/version.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
#define VERSION "3.11.1"
1+
#define VERSION "3.12.1"

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