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morimotopmundt
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sh: clkfwk: bugfix: sh_clk_div_enable() care sh_clk_div_set_rate() if div6
764f4e4 (sh: clkfwk: Use shared sh_clk_div_enable/disable()) shared enable/disable funcions for div4/div6. But new sh_clk_div_enable() didn't care sh_clk_div_set_rate() which is required on div6 clock. This patch fixes it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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drivers/sh/clk/cpg.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -126,6 +126,12 @@ static int sh_clk_div_set_rate(struct clk *clk, unsigned long rate)
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static int sh_clk_div_enable(struct clk *clk)
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{
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if (clk->div_mask == SH_CLK_DIV6_MSK) {
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int ret = sh_clk_div_set_rate(clk, clk->rate);
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if (ret < 0)
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return ret;
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}
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sh_clk_write(sh_clk_read(clk) & ~CPG_CKSTP_BIT, clk);
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return 0;
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}

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